CMOS DLL Based 2V, 3.2ps Jitter, 1GHz Clock Synthesizer and Temperature-Compensated Tunable Oscillator

This paper describes a low-voltage, low-jitter clock synthesizer and a temperaturecompensated tunable oscillator. Both of these circuits employ a self-correcting Delay-Locked Loop (DLL) which solves the problem of false locking associated with conventional DLLs. This DLL does not require the delay control voltage to be set on power-up, it can recover from missing reference clock pulses and because the delay range is not restricted, it can accommodate a variable reference clock frequency. The DLL provides multiple clock phases that are combined to produce the desired output frequency for the synthesizer, and provides temperature-compensated biasing for the tunable oscillator. With a 2V supply the measured rms jitter for the 1GHz synthesizer output was 3.2ps. With a 3.3V supply rms jitter of 3.1ps was measured for a 1.6GHz output. The tunable oscillator has a 1.8% frequency variation over an ambient temperature range from 0 to 85C. The circuits were fabricated on a generic 0.5μm digital CMOS process.